IRQs (Interrupt Request lines)
Interrupt Request lines are special pathways directly to the processor that a device uses to get the attention of the CPU when it needs to. Actually, the lines go through an interrupt controller (which is usually part of the chipset on your motherboard) that checks the information (and source) before passing it on to the CPU. Each line has a specific number and the CPU associates that number with a certain device. Each device is also assigned a priority level. When an interrupt request is received, the processor will put aside what it's doing and handle the request. When it's finished, it will return to the task it was at originally. However, if an IRQ is received and the task being performed has a higher priority, then it will finish the task before the interrupt is handled.

DMA Channels
DMA stands for Direct Memory Access. These are channels which allow specific devices such as hard drives, CD ROMS, tape drives and sound cards to access memory directly, without having to pass through the CPU. This allows for faster data transfers. Once again, each device requires its own channel. If two devices are assigned the same DMA channel, neither will write to memory properly, and a resource conflict could freeze up your system.

I/O Addresses
Each device on a computer is assigned and allocated a specific area in memory to exchange data and information with the rest of the computer. The size of the memory area, or segment, allocated for exchange may differ between devices. The I/O address (or Input/Output address) is the starting address for the area in memory assigned to a particular device, and is given in hexadecimal notation. As you know, an IRQ is a line directly to the CPU to get its attention, well, an I/O address is kind of like a reverse IRQ. It allows access back to that device. If a CPU wants a particular device to do something, it sends a signal or instructions to the device's I/O address. The device then carries out the instructions and responds via the data bus or DMA channels.

Bus Mastering
Originally, to write from one device to another, the CPU had to acknowledge the interrupt from the one device, receive the data, then access the other device via the I/O address, and transmit the information. The transfer between devices was controlled by the CPU.

Newer expansion bus types included a bus controller. This circuitry, included with the circuitry on a particular device, could allow the device to control its own transfer of data to another device, freeing up the CPU for other tasks. A device with these capabilities is called a Bus Mastering device.

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